The present invention relates to controls for system resources and, more particularly, to controls for shared system resources providing for power conservation.
In semiconductor chips with large cache arrays, a substantial amount of the available power is used by the array. In one attempt to reduce array power consumption, lower-power array cells have been utilized. Such low-power array cells, however, may degrade system performance.
In another attempt to reduce array power consumption, arrays have been designed which allow the clock input to be shut off providing an array "standby" mode. These arrays, however, often suffer performance degradation resulting from turning on the array in the cycle that it is needed.
In the prior art is U.S. Pat. No. 5,339,445 to Gasztonyi which describes a further attempt to reduce array power consumption. Gasztonyi maintains a data table with historical information on power consumption and uses the data to regulate power for future operations. Operating on historical data, however, can lead to inaccuracies in power application and correspondingly to inefficient operation of the array.
Thus, there is a need in the art for a method and apparatus for controlling power application to an array that conserves power while optimizing array performance.